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TI(德州仪器) LMP7707
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  • TI(德州仪器) LMP7707
  • TI(德州仪器) LMP7707
  • TI(德州仪器) LMP7707
  • TI(德州仪器) LMP7707
  • TI(德州仪器) LMP7707
  • TI(德州仪器) LMP7707
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LMP7707

LMP7707

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精密 CMOS 输入 RRIO 宽电源电压范围解补偿单通道放大器

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The LMP7707/LMP7708/LMP7709 devices are single, dual, and quad low offset voltage, rail-to-rail input and output precision amplifiers which each have a CMOS input stage and a wide supply voltage range. The LMP7707/LMP7708/LMP7709 are part of the LMP precision amplifier family and are ideal for sensor interface and other instrumentation applications. These decompensated amplifiers are stable at a gain of 6 and higher.

The ensured low offset voltage of less than ±200 µV along with the ensured low input bias current of less than ±1 pA make the LMP7707/LMP7708/LMP7709 ideal for precision applications. The LMP7707/LMP7708/LMP7709 are built utilizing VIP50 technology, which allows the combination of a CMOS input stage and a supply voltage range of 12V with rail-to-rail common mode voltage capability. The LMP7707/LMP7708/LMP7709 are the perfect choice in many applications where conventional CMOS parts cannot operate due to the voltage conditions.

The unique design of the rail-to-rail input stage of each of the LMP7707/LMP7708/LMP7709 significantly reduces the CMRR glitch commonly associated with rail-to-rail input amplifiers. Both sides of the complimentary input stage have been trimmed, thereby reducing the difference between the NMOS and PMOS offsets. The output swings within 40 mV of either rail to maximize the signal dynamic range in applications requiring low supply voltage.

The LMP7707 is offered in the space-saving 5-pin SOT-23 and 8-pin SOIC packages, the LMP7708 is offered in the 8-pin VSSOP and 8-pin SOIC packages, and the quad LMP7709 is offered in the 14-pin TSSOP and 14-pin SOIC packages. These small packages are ideal solutions for area constrained PC boards and portable electronics.

  • Unless Otherwise Noted, Typical Values at VS = 5V.
  • Input Offset Voltage (LMP7707) ±200 µV (Max)
  • Input Offset Voltage (LMP7708/LMP7709) ±220 µV (Max)
  • Input Bias Current ±200 fA
  • Input Voltage Noise 9 nV/√Hz
  • CMRR 130 dB
  • Open Loop Gain 130 dB
  • Temperature Range −40°C to 125°C
  • Gain Bandwidth Product (AV =10) 14 MHz
  • Stable at a Gain of 10 or Higher
  • Supply Current (LMP7707) 715 µA
  • Supply Current (LMP7708) 1.5 mA
  • Supply Current (LMP7709) 2.9 mA
  • Supply Voltage Range 2.7V to 12V
  • Rail-to-Rail Input and Output

All trademarks are the property of their respective owners.

Number of channels1
Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V)12
Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V)2.7
Vos (offset voltage at 25°C) (max) (mV)0.2
GBW (typ) (MHz)14
FeaturesDecompensated
Slew rate (typ) (V/µs)5.6
Rail-to-railIn, Out
Offset drift (typ) (µV/°C)1
Iq per channel (typ) (mA)0.79
Vn at 1 kHz (typ) (nV√Hz)9
CMRR (typ) (dB)130
RatingCatalog
Operating temperature range (°C)-40 to 125
Input bias current (max) (pA)1
Iout (typ) (A)0.066
ArchitectureCMOS
Input common mode headroom (to negative supply) (typ) (V)-0.2
Input common mode headroom (to positive supply) (typ) (V)0.2
Output swing headroom (to negative supply) (typ) (V)0.04
Output swing headroom (to positive supply) (typ) (V)-0.04
THD + N at 1 kHz (typ) (%)0.024
SOIC (D)829.4 mm² 4.9 x 6
SOT-23 (DBV)58.12 mm² 2.9 x 2.8
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