TMS320C6672系列介绍资料

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TMS320C6672

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高性能双核 C66x 定点和浮点 DSP- 高达 1.25GHz

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The TMS320C6672 Multicore Fixed and Floating Point Digital Signal Processor is based on TI's KeyStone multicore architecture. Integrated with two C66x CorePac DSPs, each core runs at 1.0 to 1.25 GHz enabling up to 2.5 GHz. The device supports high-performance signal processing applications such as mission critical, medical imaging, test, and automation. The C6672 platform is power efficient and easy to use. The C66x CorePac DSP is fully backward compatible with all existing C6000 family of fixed and floating point DSPs.

Two TMS320C66x DSP Core Subsystems at 1.00 GHz and 1.25GHz
- 80 GMAC/40 GFLOP @ 1.2GHz
- 32KB L1P, 32KB L1D, 512KB L2 Per Core
- 2 MB Shared L2
Multicore Navigator and TeraNet Switch Fabric - 2 Tb
Network Coprocessors- Packet Accelerator, Security Accelerator
Four Lanes of SRIO 2.1 - 5 Gbaud Per Lane Full Duplex
Two Lanes PCIe Gen2 - 5 Gbaud Per Lane Full Duplex
HyperLink - 50Gbaud Operation, Full Duplex
Ethernet MAC Subsystem - Two SGMII Ports w/ 10/100/1000 Mbps operation
64-Bit DDR3 Interface (DDR3-1600) - 8 GByte Addressable Memory Space
16-Bit EMIF - Async SRAM, NAND and NOR Flash Support
Two Telecom Serial Ports (TSIP) - 2/4/8 Lanes at 32.768/16.384/8.192
UART Interface
I2C Interface
16 GPIO Pins
SPI Interface
Sixteen 64-Bit Timers
Three On-Chip PLLs

DSP type	2 C66x
DSP (max) (MHz)	1000, 1250, 1500
CPU	32-/64-bit
Operating system	DSP/BIOS
Security	Crypto accelerators
Ethernet MAC	2-Port 1Gb switch
PCIe	2 PCIe Gen2
Rating	Catalog
Operating temperature range (°C)	-40 to 100

FCBGA (CYP)

841

576 mm² 24 x 24

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TMS320C6672

高性能双核 C66x 定点和浮点 DSP- 高达 1.25GHz

4000-306-326