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TI(德州仪器) LMH6502
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  • TI(德州仪器) LMH6502
  • TI(德州仪器) LMH6502
  • TI(德州仪器) LMH6502
  • TI(德州仪器) LMH6502
  • TI(德州仪器) LMH6502
  • TI(德州仪器) LMH6502
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LMH6502

LMH6502

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宽带、低功耗、dB 线性可变增益放大器

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  • 说明
  • 特性
  • 参数
  • 封装 | 引脚 | 尺寸

The LMH6502 is a wideband DC coupled differential input voltage controlled gain stage followed by a high-speed current feedback Op Amp which can directly drive a low impedance load. Gain adjustment range is more than 70dB for up to 10MHz.

Maximum gain is set by external components and the gain can be reduced all the way to cut-off. Power consumption is 300mW with a speed of 130MHz. Output referred DC offset voltage is less than 350mV over the entire gain control voltage range. Device-to-device Gain matching is within ±0.6dB at maximum gain. Furthermore, gain at any VG is tested and the tolerance is ensured. The output current feedback Op Amp allows high frequency large signals (Slew Rate = 1800V/μs) and can also drive heavy load current (75mA). Differential inputs allow common mode rejection in low level amplification or in applications where signals are carried over relatively long wires. For single ended operation, the unused input can easily be tied to ground (or to a virtual half-supply in single supply application). Inverting or non-inverting gains could be obtained by choosing one input polarity or the other.

To provide ease of use when working with a single supply, VG range is set to be from 0V to +2V relative to pin 11 potential (ground pin). In single supply operation, this ground pin is tied to a "virtual" half supply.

LMH6502 gain control is linear in dB for a large portion of the total gain control range. This makes the device suitable for AGC circuits among other applications. For linear gain control applications, see the LMH6503 datasheet. The LMH6502 is available in the SOIC and TSSOP package.

  • VS = ±5V, TA = 25°C, RF = 1kΩ, RG = 174Ω, RL = 100Ω, AV = AV(MAX) = 10 Typical Values Unless Specified.
  • -3dB BW: 130MHz
  • Gain Control BW: 100MHz
  • Adjustment Range (Typical Over Temp): 70dB
  • Gain Matching (Limit): ±0.6dB
  • Slew Rate: 1800V/µs
  • Supply Current (No Load): 27mA
  • Linear Output Current: ±75mA
  • Output Voltage (RL = 100Ω): ±3.2V
  • Input Voltage Noise: 7.7nV/√Hz
  • Input Current Noise: 2.4pA/√Hz
  • THD (20MHz, RL = 100Ω, VO = 2VPP): −53dBc
  • Replacement for CLC520

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FeaturesAnalog Gain Set, Differential to Single-ended conversion
PGA/VGAVGA
Number of channels1
Vs (max) (V)12
Vs (min) (V)5
BW at Acl (MHz)130
Acl, min spec gain (V/V)1
Slew rate (typ) (V/µs)1800
Gain (max) (dB)40
RatingCatalog
Operating temperature range (°C)-40 to 85
SOIC (D)1451.9 mm² 8.65 x 6
TSSOP (PW)1432 mm² 5 x 6.4
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