The OPA656 device combines a very wideband, unity-gain stable, voltage-feedback operational amplifier with a FET-input stage to offer an ultra high dynamic-range amplifier for Analog-to-Digital Converter (ADC) buffering and transimpedance applications. Extremely low DC errors give good precision in optical applications.
The high unity-gain stable bandwidth and JFET input allows exceptional performance in high-speed, low-noise integrators.
The high input impedance and low bias current provided by the FET input is supported by the ultra-low 7-nV/√Hz input voltage noise to achieve a very low integrated noise in wideband photodiode transimpedance applications.
Broad transimpedance bandwidths are achievable given the OPA656 device’s high 230-MHz gain bandwidth product. As shown below, a –3-dB bandwidth of 1 MHz is provided even for a high 1-MΩ transimpedance gain from a 47-pF source capacitance.
| Architecture | FET / CMOS Input, Voltage FB |
| Number of channels | 1 |
| Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) | 8 |
| Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) | 12 |
| GBW (typ) (MHz) | 230 |
| BW at Acl (MHz) | 500 |
| Acl, min spec gain (V/V) | 1 |
| Slew rate (typ) (V/µs) | 290 |
| Vn at flatband (typ) (nV√Hz) | 7 |
| Vn at 1 kHz (typ) (nV√Hz) | 10 |
| Iq per channel (typ) (mA) | 14 |
| Vos (offset voltage at 25°C) (max) (mV) | 0.6 |
| Rail-to-rail | No |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 85 |
| CMRR (typ) (dB) | 86 |
| Input bias current (max) (pA) | 5 |
| Offset drift (typ) (µV/°C) | 2 |
| Iout (typ) (mA) | 70 |
| 2nd harmonic (dBc) | 71 |
| 3rd harmonic (dBc) | 81 |
| Frequency of harmonic distortion measurement (MHz) | 5 |
| SOIC (D) | 8 | 29.4 mm² 4.9 x 6 |
| SOT-23 (DBV) | 5 | 8.12 mm² 2.9 x 2.8 |
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