h1_key

TI(德州仪器) SN74CBT3125C
德州仪器 (TI) 全系列产品在线购买
  • TI(德州仪器) SN74CBT3125C
  • TI(德州仪器) SN74CBT3125C
  • TI(德州仪器) SN74CBT3125C
  • TI(德州仪器) SN74CBT3125C
  • TI(德州仪器) SN74CBT3125C
  • TI(德州仪器) SN74CBT3125C
立即查看
您当前的位置: 首页 > 开关与多路复用器 > 模拟开关和多路复用器 > SN74CBT3125C
SN74CBT3125C

SN74CBT3125C

正在供货

具有 –2V 下冲保护的 5V、1:1 (SPST)、4 通道 FET 总线开关

产品详情
  • 说明
  • 特性
  • 参数
  • 封装 | 引脚 | 尺寸

The SN74CBT3125C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT3125C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBT3125C is organized as four 1-bit bus switches with separate output-enable (1OE, 2OE, 3OE, 4OE) inputs. It can be used as four 1-bit bus switches or as one 4-bit bus switch. When OE is low, the associated 1-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the associated 1-bit bus switch is OFF, and the high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

  • Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low On-State Resistance (ron) Characteristics
          (ron = 3 Typical)
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion
         (Cio(OFF) = 5 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption
         (ICC = 3 µA Max)
  • VCC Operating Range From 4 V to 5.5 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: USB Interface, Bus Isolation, Low-Distortion Signal Gating

Configuration1
Number of channels4
Power supply voltage - single (V)5
ProtocolsAnalog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART
Ron (typ) (Ω)3
CON (typ) (pF)12.5
ON-state leakage current (max) (µA)10
Bandwidth (MHz)200
Operating temperature range (°C)-40 to 85
FeaturesUndershoot protection
Input/output continuous current (max) (mA)128
RatingCatalog
Drain supply voltage (max) (V)5.5
Supply voltage (max) (V)5.5
SOIC (D)1451.9 mm² 8.65 x 6
SSOP (DB)1448.36 mm² 6.2 x 7.8
SSOP (DBQ)1629.4 mm² 4.9 x 6
TSSOP (PW)1432 mm² 5 x 6.4
VQFN (RGY)1412.25 mm² 3.5 x 3.5
产品购买
  • 商品型号
  • 封装
  • 工作温度
  • 包装
  • 价格
  • 现货库存
  • 操作
10s
温馨提示:
订单商品问题请移至我的售后服务提交售后申请,其他需投诉问题可移至我的投诉提交,我们将在第一时间给您答复
返回顶部