The SN74CBT3126 quadruple FET bus switch features independent line switches. Each switch is disabled when the associated output-enable (OE) input is low.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pullup resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
| Configuration | 1 |
| Number of channels | 4 |
| Power supply voltage - single (V) | 5 |
| Protocols | Analog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART |
| Ron (typ) (Ω) | 5 |
| ON-state leakage current (max) (µA) | 1 |
| Bandwidth (MHz) | 200 |
| Operating temperature range (°C) | -40 to 85 |
| Input/output continuous current (max) (mA) | 128 |
| Rating | Catalog |
| Drain supply voltage (max) (V) | 5.5 |
| Supply voltage (max) (V) | 5.5 |
| SOIC (D) | 14 | 51.9 mm² 8.65 x 6 |
| SSOP (DB) | 14 | 48.36 mm² 6.2 x 7.8 |
| SSOP (DBQ) | 16 | 29.4 mm² 4.9 x 6 |
| TSSOP (PW) | 14 | 32 mm² 5 x 6.4 |
| VQFN (RGY) | 14 | 12.25 mm² 3.5 x 3.5 |
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