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TI(德州仪器) LMX2486
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  • TI(德州仪器) LMX2486
  • TI(德州仪器) LMX2486
  • TI(德州仪器) LMX2486
  • TI(德州仪器) LMX2486
  • TI(德州仪器) LMX2486
  • TI(德州仪器) LMX2486
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LMX2486

LMX2486

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用于射频个人通信的 1GHz 至 4.5GHz Δ-Σ 低功耗双路 PLL

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  • 封装 | 引脚 | 尺寸

The LMX2486 device is a low-power, high performance delta-sigma fractional-N PLL with an auxiliary integer-N PLL. The device is fabricated using TI’s advanced process.

With delta-sigma architecture, fractional spurs at lower offset frequencies are pushed to higher frequencies outside the loop bandwidth. The ability to push close in spur and phase noise energy to higher frequencies is a direct function of the modulator order. Unlike analog compensation, the digital feedback technique used in the LMX2486 is highly resistant to changes in temperature and variations in wafer processing. The LMX2486 delta-sigma modulator is programmable up to fourth order, which allows the designer to select the optimum modulator order to fit the phase noise, spur, and lock time requirements of the system.

Serial data for programming the LMX2486 is transferred through a three-line, high-speed (20-MHz) MICROWIRE interface. The LMX2486 offers fine frequency resolution, low spurs, fast programming speed, and a single-word write to change the frequency. This makes it ideal for direct digital modulation applications, where the N-counter is directly modulated with information. The LMX2486 is available in a 24-lead 4.0 × 4.0 × 0.8 mm WQFN package.

  • Quadruple Modulus Prescaler for Lower Divids
    • RF PLL: 16/17/20/21 or 32/33/36/37
    • IF PLL: 8/9 or 16/17
  • Advanced Delta Sigma Fractional Compensation
    • 12-Bit or 22-Bit Selectable Fractional
      Modulus
    • Up to 4th Order Programmable Delta-Sigma Modulator
  • Improved Lock Times and Programming
    • Fastlock / Cycle Slip Reduction Which Requires
      Only a Single-Word Write
    • Integrated Time-Out Counter
  • Wide Operating Range
    • LMX2486 RF PLL: 1.0 GHz to 4.5 GHz
  • Useful Features
    • Digital Lock Detect Output
    • Hardware and Software Power-Down Control
    • On-Chip Crystal Reference Frequency Doubler
    • RF Phase Detector Frequency Up to 50 MHz
    • 2.5-V to 3.6-V Operation With ICC = 8.5 mA
Integrated VCONo
Output frequency (min) (MHz)1000
Output frequency (max) (MHz)4500
Normalized PLL phase noise (dBc/Hz)-210
Current consumption (mA)5.7
FeaturesAdvanced delta-sigma fractional compensation, Cycle slip reduction, Dual PLL, Fastlock, Integrated timeout counter, On-chip input frequency doubler
1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz)-104
RatingCatalog
Operating temperature range (°C)-40 to 85
Lock time (µs) (typ)Loop BW dependent
WQFN (RTW)2416 mm² 4 x 4
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