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TI(德州仪器) LMX2470
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  • TI(德州仪器) LMX2470
  • TI(德州仪器) LMX2470
  • TI(德州仪器) LMX2470
  • TI(德州仪器) LMX2470
  • TI(德州仪器) LMX2470
  • TI(德州仪器) LMX2470
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LMX2470

LMX2470

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具有 800MHz 整数 N PLL 的 2.6GHz Δ-Σ 分数 N PLL

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  • 封装 | 引脚 | 尺寸

The LMX2470 is a low power, high performance delta-sigma fractional-N PLL with an auxiliary integer-N PLL. The device is fabricated using TI’s advanced BiCMOS process.

With delta-sigma architecture, fractional spur compensation is achieved with noise shaping capability of the delta-sigma modulator and the inherent low pass filtering of the PLL loop filter. Fractional spurs at lower frequencies are pushed to higher frequencies outside the loop bandwidth. Unlike analog compensation, the digital feedback techniques used in the LMX2470 are highly resistant to changes in temperature and variations in wafer processing. With delta-sigma architecture, the ability to push close in spur and phase noise energy to higher frequencies is a direct function of the modulator order. The higher the order, the more this energy can be spread to higher frequencies. The LMX2470 has a programmable modulator up to order four, which allows the designer to select the optimum modulator order to fit the phase noise, spur, and lock time requirements of the system.

Programming is fast and simple. Serial data is transferred into the LMX2470 via a three line MICROWIRE interface (Data, Clock, Load Enable). Nominal supply voltage is 2.5 V. The LMX2470 features a typical current consumption of 4.1 mA at 2.5 V. The LMX2470 is available in a 24 lead 3.5 X 4.5 X 0.6 mm package.

  • Low In-Band Phase Noise and Low Fractional Spurs
  • 12 Bit or 22 Bit Selectable Fractional Modulus
  • Up to 4th Order Programmable Delta-Sigma Modulator
  • Enhanced Anti-Cycle Slip Fastlock Circuitry
    • Fastlock
    • Cycle Slip Reduction
    • Integrated Timeout Counters
  • Digital Lock Detect Output
  • Prescalers Allow Wide Range of N Values
    • RF PLL: 16/17/20/21
    • IF PLL: 8/9 or 16/17
  • Crystal Reference Frequency up to 110 MHz
  • On-chip Crystal Reference Frequency Doubler.
  • Phase Comparison Frequency up to 30 MHz
  • Hardware and Software Power-down Control
  • Ultra Low Consumption: ICC = 4.1 mA (Typical)

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Integrated VCONo
Output frequency (min) (MHz)500
Output frequency (max) (MHz)2600
Normalized PLL phase noise (dBc/Hz)-210
Current consumption (mA)3.9
FeaturesCycle slip reduction, Delta-sigma modulation, Dual PLL, Fastlock, Integrated timeout counter, On-chip input frequency doubler
1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz)-104
RatingCatalog
Operating temperature range (°C)-40 to 85
Lock time (µs) (typ)Loop BW dependent
ULGA (NPF)2415.75 mm² 3.5 x 4.5
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