The differential LVPECL clock-driver circuit distributes one pair of differential LVPECL clock inputs (CLKIN, CLKIN) to nine pairs of differential clock (Y, Y) outputs with minimum skew for clock distribution. It is specifically designed for driving 50-
transmission lines.
The VREF output can be strapped to the CLKIN input for a single-ended CLKIN input.
The CDCVF111 is characterized for operation from –40°C to 85°C.
| Function | Differential |
| Output frequency (max) (MHz) | 650 |
| Number of outputs | 9 |
| Output supply voltage (V) | 3.3 |
| Core supply voltage (V) | 3.3 |
| Output skew (ps) | 50 |
| Features | 1 |
| Operating temperature range (°C) | -40 to 85 |
| Rating | Catalog |
| Output type | LVPECL |
| Input type | LVPECL |
| PLCC (FN) | 28 | 155.0025 mm² 12.45 x 12.45 |
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