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The ADC141S628-Q1 device is a 14-bit, 200-kSPS, pseudo-differential, analog-to-digital converter (ADC) that is AEC-Q100 grade 2 qualified. The converter is based on a successive-approximation register (SAR) architecture and has pseudo-differential analog inputs. The signal path is maintained from the internal sample-and-hold circuits throughout the ADC to provide excellent common-mode noise rejection. The ADC141S628-Q1 features a zero-power track mode where the ADC is consuming the minimum amount of supply current while the internal sampling capacitor tracks the applied analog input voltage.

The serial data output of the ADC141S628-Q1 is straight binary and is compatible with several standards, such as SPI, QSPI, Microwire, and many common DSP serial interfaces. The ADC141S628-Q1 has no latency which means the conversion result is clocked out by the serial clock input and is the result of the conversion currently in progress.

The ADC141S628-Q1 can be operated with independent analog (VA) and digital input/output (VIO) supplies. VA and VIO can range from 4.5 V to 5.5 V and can be set independent of each other. This functionality allows a user to maximize performance and minimize power consumption. Similarly, the ADC141S628-Q1 uses an external reference that can be varied from 1.0 V to VA allowing users to optimize the full dynamic range of the input. The pseudo-differential input, low power consumption, and small size make the ADC141S628-Q1 ideal for remote data acquisition applications.

Operation is specified over the temperature range of –40°C to +105°C and clock rates of 0.36 MHz to 3.6 MHz. The ADC141S628-Q1 is available in a 10-lead package.