The 12-bit, 3.6 GSPS ADC12D1800 is the latest advance in TI’s Ultra-High-Speed ADC family and builds upon the features, architecture and functionality of the 10-bit GHz family of ADCs.
The ADC12D1800 provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and supports programmable common mode voltage.
The product is packaged in a leaded or lead-free 292-ball thermally enhanced BGA package over the rated industrial temperature range of –40°C to +85°C.
To achieve full rated performance for fCLK > 1.6 GHz, write the maximum power settings one time to Register 6h through the serial interface; see Section 5.6.1 for more information.
| Sample rate (max) (Msps) | 1800, 3600 |
| Resolution (Bits) | 12 |
| Number of input channels | 1, 2 |
| Interface type | Parallel LVDS |
| Analog input BW (MHz) | 2800 |
| Features | Ultra High Speed |
| Rating | Catalog |
| Peak-to-peak input voltage range (V) | 0.8 |
| Power consumption (typ) (mW) | 4180 |
| Architecture | Folding Interpolating |
| SNR (dB) | 58.6 |
| ENOB (bit) | 9.4 |
| SFDR (dB) | 73 |
| Operating temperature range (°C) | -40 to 85 |
| Input buffer | Yes |
| PBGA (NXA) | 292 | 729 mm² 27 x 27 |
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