The ADC128S102 device is a low-power, eight-channel CMOS 12-bit analog-to-digital converter specified for conversion throughput rates of 50 kSPS to 1 MSPS. The converter is based on a successive-approximation register architecture with an internal track-and-hold circuit. The device can be configured to accept up to eight input signals at inputs IN0 through IN7.
The output serial data is straight binary and is compatible with several standards, such as SPI, QSPI, MICROWIRE, and many common DSP serial interfaces.
The ADC128S102 may be operated with independent analog and digital supplies. The analog supply (VA) can range from 2.7 V to 5.25 V, and the digital supply (VD) can range from 2.7 V to VA. Normal power consumption using a 3-V or 5-V supply is 2.3 mW and 10.7 mW, respectively. The power-down feature reduces the power consumption to 0.06 µW using a 3-V supply and 0.25 µW using a 5-V supply.
| Resolution (Bits) | 12 |
| Sample rate (max) (ksps) | 1000 |
| Number of input channels | 8 |
| Interface type | Microwire (Serial I/O), SPI |
| Architecture | SAR |
| Input type | Single-ended |
| Multichannel configuration | Multiplexed |
| Rating | Space |
| Reference mode | Supply |
| Input voltage range (max) (V) | 5.25 |
| Input voltage range (min) (V) | 0 |
| Operating temperature range (°C) | -55 to 125 |
| Power consumption (typ) (mW) | 2.3 |
| Analog supply (min) (V) | 2.7 |
| Analog supply voltage (max) (V) | 5.25 |
| SNR (dB) | 72 |
| Digital supply (min) (V) | 2.7 |
| Digital supply (max) (V) | 5.25 |
| CFP (NAC) | 16 | 62.9285 mm² 9.91 x 6.35 |
| CFP (NAD) | 16 | 62.9285 mm² 9.91 x 6.35 |
| DIESALE (Y) | — | See data sheet |
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