h1_key

TI(德州仪器) ADC08D1520QML-SP
德州仪器 (TI) 全系列产品在线购买
  • TI(德州仪器) ADC08D1520QML-SP
  • TI(德州仪器) ADC08D1520QML-SP
  • TI(德州仪器) ADC08D1520QML-SP
  • TI(德州仪器) ADC08D1520QML-SP
  • TI(德州仪器) ADC08D1520QML-SP
  • TI(德州仪器) ADC08D1520QML-SP
立即查看
您当前的位置: 首页 > 数据转换器 > 模数转换器 (ADC) > 高速 ADC (≥10MSPS) > ADC08D1520QML-SP
ADC08D1520QML-SP

ADC08D1520QML-SP

正在供货

耐辐射加固保障 (RHA)、QMLV、300krad、陶瓷、8 位、双通道 1.5GSPS 或单通道 3GSPS ADC

产品详情
  • 说明
  • 特性
  • 参数
  • 封装 | 引脚 | 尺寸

The ADC08D1520 is an 8–Bit, dual channel, low power, high performance CMOS analog-to-digital converter that builds upon the ADC08D1000 platform. The ADC08D1520 digitizes signals to 8 bits of resolution at sample rates up to 1.7 GSPS. It has expanded features compared to the ADC08D1000, which include a test pattern output for system debug, clock phase adjust, and selectable output demultiplexer modes. Consuming a typical 2.0W in Demultiplex Mode at 1.5 GSPS from a single 1.9 Volt supply, this device is ensured to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the self-calibration scheme enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.2 Effective Number of Bits (ENOB) with a 748 MHz input signal and a 1.5 GHz sample rate while providing a 10-18 Code Error Rate (C.E.R.) Output formatting is offset binary and the Low Voltage Differential Signaling (LVDS) digital outputs are compatible with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between 0.8V and 1.2V.

Each converter has a selectable output demultiplexer which feeds two LVDS buses. If the 1:2 Demultiplexed Mode is selected, the output data rate is reduced to half the input sample rate on each bus. When Non-Demultiplexed Mode is selected, the output data rate on channels DI and DQ are at the same rate as the input sample clock. The two converters can be interleaved and used as a single 3 GSPS ADC.

The converter typically consumes less than 2.9 mW in the Power Down Mode and is available in a 128-pin, thermally enhanced, multi-layer ceramic quad package and operates over the Military (-55°C ≤ TA ≤ +125°C) temperature range.

  • Total Ionizing Dose 300 krad(Si)
  • Single Event Latch-up 120 MeV-cm2/mg
  • Single +1.9V ±0.1V Operation
  • Interleave Mode for 2x Sample Rate
  • Multiple ADC Synchronization Capability
  • Adjustment of Input Full-Scale Range, Offset and Clock Phase Adjustment
  • Choice of SDR or DDR output clocking
  • 1:1 or 1:2 Selectable Output Demux
  • Second DCLK output
  • Duty Cycle Corrected Sample Clock
  • Test pattern
  • Serial Interface for Extended Control

Key Specifications

  • Resolution 8 Bits
  • Max Conversion Rate 1.5 GSPS (min)
  • Code Error Rate 10-18 (typ)
  • ENOB at 748 MHz Input 7.2 Bits (typ)
  • DNL ±0.15 LSB (typ)
  • Power Consumption
    • Operating in 1:2 Demux Output 2.0 W (typ)
    • Power Down Mode 2.9 mW (typ)

All trademarks are the property of their respective owners.

Sample rate (max) (Msps)1500, 3000
Resolution (Bits)8
Number of input channels1, 2
Interface typeParallel LVDS
Analog input BW (MHz)2000
FeaturesUltra High Speed
RatingSpace
Peak-to-peak input voltage range (V)0.87
Power consumption (typ) (mW)2000
ArchitectureFolding Interpolating
SNR (dB)47
ENOB (bit)7.4
SFDR (dB)55.5
Operating temperature range (°C)-55 to 125
Input bufferYes
Radiation, TID (typ) (krad)300
Radiation, SEL (MeV·cm2/mg)120
CFP (NBC)128382.515364 mm² 19.558 x 19.558
产品购买
  • 商品型号
  • 封装
  • 工作温度
  • 包装
  • 价格
  • 现货库存
  • 操作

很抱歉,暂时无法提供与“ADC08D1520QML-SP”系列相匹配的产品,您可以联系专属客服快速找货或在现货搜索框中重新搜索。

10s
温馨提示:
订单商品问题请移至我的售后服务提交售后申请,其他需投诉问题可移至我的投诉提交,我们将在第一时间给您答复
返回顶部