h1_key

TI(德州仪器) ADC08B200
德州仪器 (TI) 全系列产品在线购买
  • TI(德州仪器) ADC08B200
  • TI(德州仪器) ADC08B200
  • TI(德州仪器) ADC08B200
  • TI(德州仪器) ADC08B200
  • TI(德州仪器) ADC08B200
  • TI(德州仪器) ADC08B200
立即查看
您当前的位置: 首页 > 数据转换器 > 模数转换器 (ADC) > 高速 ADC (≥10MSPS) > ADC08B200
ADC08B200

ADC08B200

正在供货

缓冲区容量为 1K 的 8 位、200MSPS 模数转换器 (ADC)

产品详情
  • 说明
  • 特性
  • 参数
  • 封装 | 引脚 | 尺寸

The ADC08B200 is a high speed analog-to-digital converter (ADC) with an integrated capture buffer. The 8-bit, 200 MSPS A/D core is based upon the proven ADC08200 with integrated track-and-hold and is optimized for low power consumption. This device contains a selectable size capture buffer of up to 1,024 bytes that allows fast capture of an input signal with a slower readout rate. An on-chip clock PLL circuit provides the option of on-chip clock rate multiplication to provide the high speed sampling clock.

The ADC08B200 is resistant to latch-up and the outputs are short-circuit proof. The top and bottom of the ADC08B200's reference ladder are available for connections, enabling a wide range of input possibilities. The digital outputs are TTL/CMOS compatible with a separate output power supply pin to support interfacing with 2.7V to 3.3V logic. The digital inputs and outputs are low voltage TTL/CMOS compatible and the output data format is straight binary.

The ADC08B200Q runs on an Automotive Grade Flow and is AEC-Q100 Grade 2 Qualified.

The ADC08B200 is offered in a 48-pin plastic package (TQFP) and is specified over the extended industrial temperature range of −40°C to +105°C. An evaluation board is available to assist in the easy evaluation of the ADC08B200.

  • Single-Ended Input
  • Selectable Capture Buffer Size
  • PLL for Clock Multiplication
  • Reference Ladder Top and Bottom Accessible
  • Linear Power Scaling with Sample Rate
  • FPGA Training Pattern
  • AEC-Q100 Grade 2 Qualified
  • Power-Down Feature

Key Specifications

    (PLL Bypassed)

  • Resolution 8 Bits
  • Maximum Sampling Frequency 200 MSPS (min)
  • DNL ±0.4 LSB (typ)
  • ENOB (fIN= 49 MHz) 7.2 bits (typ)
  • THD (fIN= 49 MHz) −53 dBc (typ)
  • Power Consumption
    • Operating (50 MHz) Input 2 mW / Msps (typ)
    • Power Down 2.15 mW (typ)

All trademarks are the property of their respective owners.

Sample rate (max) (Msps)200
Resolution (Bits)8
Number of input channels1
Interface typeParallel CMOS
Analog input BW (MHz)500
FeaturesLow Power
RatingCatalog
Peak-to-peak input voltage range (V)1.6
Power consumption (typ) (mW)543
ArchitecturePipeline
SNR (dB)47
ENOB (bit)7.4
SFDR (dB)56
Operating temperature range (°C)-40 to 105
Input bufferNo
TQFP (PFB)4881 mm² 9 x 9
产品购买
  • 商品型号
  • 封装
  • 工作温度
  • 包装
  • 价格
  • 现货库存
  • 操作
10s
温馨提示:
订单商品问题请移至我的售后服务提交售后申请,其他需投诉问题可移至我的投诉提交,我们将在第一时间给您答复
返回顶部