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TI(德州仪器) ADS5272
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  • TI(德州仪器) ADS5272
  • TI(德州仪器) ADS5272
  • TI(德州仪器) ADS5272
  • TI(德州仪器) ADS5272
  • TI(德州仪器) ADS5272
  • TI(德州仪器) ADS5272
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ADS5272

ADS5272

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八通道、12 位、65MSPS 模数转换器 (ADC)

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The ADS5272 is a high-performance, 65MSPS, 8-channel analog-to-digital converter (ADC). Internal referencesare provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and transmission process. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. In addition to the eight data outputs, a bit clock and a word clock are also transmitted. The bit clock is at 6x the speed of the sampling clock, whereas the word clock is at the same speed of the sampling clock.

The ADS5272 provides internal references, or can optionally be driven with external references. Best performance is achieved through the internal reference mode.

The device is available in a TQFP-80 PowerPAD package and is specified over a -40°C to +85°C operating range.

  • Maximum Sample Rate: 65MSPS
  • 12-Bit Resolution
  • No Missing Codes
  • Total Power Dissipation:
    Internal Reference: 983mW
    External Reference: 917mW
  • CMOS Technology
  • Simultaneous Sample-and-Hold
  • 71.1dBFS SNR at 5MHz IF
  • 3.3V Digital/Analog Supply
  • Serialized LVDS Outputs
  • Integrated Frame and Bit Patterns
  • Option to Double LVDS Clock Output Currents
  • Four Current Modes for LVDS
  • Pin- and Format-Compatible Family
  • TQFP-80 PowerPAD Package
  • APPLICATIONS
    • Portable Ultrasound Systems
    • Tape Drives
    • Test Equipment
    • Optical Networking

PowerPAD Is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners

Sample rate (max) (Msps)65
Resolution (Bits)12
Number of input channels8
Interface typeParallel LVDS
Analog input BW (MHz)300
FeaturesLow Power
RatingCatalog
Peak-to-peak input voltage range (V)2
Power consumption (typ) (mW)983
ArchitecturePipeline
SNR (dB)71.2
ENOB (bit)11.5
SFDR (dB)90
Operating temperature range (°C)-40 to 85
Input bufferNo
HTQFP (PFP)80196 mm² 14 x 14
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