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TI(德州仪器) DAC5687
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  • TI(德州仪器) DAC5687
  • TI(德州仪器) DAC5687
  • TI(德州仪器) DAC5687
  • TI(德州仪器) DAC5687
  • TI(德州仪器) DAC5687
  • TI(德州仪器) DAC5687
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DAC5687

DAC5687

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双通道、16 位、500MSPS 1x-8x 内插数模转换器 (DAC)

产品详情
  • 说明
  • 特性
  • 参数
  • 封装 | 引脚 | 尺寸

The DAC5687 is a dual-channel 16-bit high-speed digital-to-analog converter (DAC) with integrated 2×, 4×, and 8× interpolation filters, a complex numerically controlled oscillator (NCO), onboard clock multiplier, IQ compensation, and on-chip voltage reference. The DAC5687 is pin-compatible to the DAC5686, requiring only changes in register settings for most applications, and offers additional features and superior linearity, noise, crosstalk, and PLL phase noise performance.

The DAC5687 has six signal processing blocks: two interpolate-by-two digital filters, a fine frequency mixer with 32-bit NCO, a quadrature modulation compensation block, another interpolate-by-two digital filter, and a coarse frequency mixer with fS/2 or fS/4. The different modes of operation enable or bypass the signal processing blocks.

The coarse and fine mixers can be combined to span a wider range of frequencies with fine resolution. The DAC5687 allows both complex or real output. Combining the frequency upconversion and complex output produces a Hilbert transform pair that is output from the two DACs. An external RF quadrature modulator then performs the final single-sideband upconversion.

The IQ compensation feature allows optimization of phase, gain, and offset to maximize sideband rejection and minimize LO feedthrough for an analog quadrature modulator.

The DAC5687 includes several input options: single-port interleaved data, even and odd multiplexing at half-rate, and an input FIFO with either external or internal clock to ease the input timing ambiguity when the DAC5687 is clocked at the DAC output sample rate.

  • 500 MSPS
  • Selectable 2×-8× Interpolation
  • On-Chip PLL/VCO Clock Multiplier
  • Full IQ Compensation Including Offset, Gain, and Phase
  • Flexible Input Options:
    • FIFO With Latch on External or Internal Clock
    • Even/Odd Multiplexed Input
    • Single Port Demultiplexed Input
  • Complex Mixer With 32-Bit NCO
  • Fixed Frequency Mixer With fS/4 and fS/2
  • 1.8-V or 3.3-V I/O Voltage
  • On-Chip 1.2-V Reference
  • Differential Scalable Output: 2 mA to 20 mA
  • Pin Compatible to DAC5686
  • High Performance
    • 81-dBc ACLR WCDMA TM1 at 30.72 MHz
    • 72-dBc ACLR WCDMA TM1 at 153.6 MHz
  • Package: 100-Pin HTQFP
  • APPLICATIONS
    • Cellular Base Transceiver Station Transmit Channel
      • CDMA: W-CDMA, CDMA2000, TD-SCDMA
      • TDMA: GSM, IS-136, EDGE/UWC-136
      • OFDM: 802.16
    • Cable Modem Termination System

PowerPAD is a trademark of Texas Instruments.
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Matlab is a trademark of The MathWorks, Inc.
All other trademarks are the property of their respective owners.

Resolution (Bits)16
Number of DAC channels2
Interface typeParallel CMOS
Sample/update rate (Msps)500
FeaturesHigh Performance
RatingCatalog
Interpolation1x, 2x, 4x, 8x
Power consumption (typ) (mW)1410
SFDR (dB)78
ArchitectureCurrent Sink
Operating temperature range (°C)-40 to 85
Reference typeInt
HTQFP (PZP)100256 mm² 16 x 16
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