h1_key

The bidirectional voltage level translation in the TCA6424A is provided through V_CCI. V_CCI should be connected to the V_CC of the external SCL/SDA lines. This indicates the V_CC level of the I²C bus to the TCA6424A. The voltage level on the P-port of the TCA6424A is determined by the V_CCP.

The TCA6424A consists of three 8-bit Configuration (input or output selection), Input, Output, and Polarity Inversion (active high) registers. At power on, the I/Os are configured as inputs. However, the system controller can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding input or output register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system controller.

The system controller can reset the TCA6424A in the event of a timeout or other improper operation by asserting a low in the RESET input. The power-on reset puts the registers in their default state and initializes the I²C/SMBus state machine. The RESET pin causes the same reset/initialization to occur without depowering the part.

The TCA6424A open-drain interrupt ( INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system controller that an input state has changed.

INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I²C bus. Thus, the TCA6424A can remain a simple target device.

The device P-port outputs have high-current sink capabilities for directly driving LEDs while consuming low device current.

One hardware pin (ADDR) can be used to program and vary the fixed I²C address and allow up to two devices to share the same I²C bus or SMBus.