These quad differential receivers accept digital data overbalanced transmission lines. They translate differential input logic levels to TTL output logic levels.
The TB5R1 is a pin- and function-compatible replacement for the Agere systems BRF1A and BRF2A; it includes 3-kV HBM and 2-kV CDM ESD protection.
The TB5R2 is a pin- and function-compatible replacement for the Agere systems BRS2A and BRS2B and incorporates a 125-mV receiver input offset, preferred state output, 3-kV HBM and 2-kV CDM ESD protection. The TB5R2 preferred state feature places the high state when the inputs are open, shorted to ground, or shorted to the power supply.
The power-down loading characteristics of the receiver input circuit are approximately 8 k
relative to the power supplies; hence they do not load the transmission line when the circuit is powered down.
The packaging for these differential line receivers include a 16-pin gull wing SOIC (DW) and SOIC (D).
The enable inputs of this device include internal pullup resistors of approximately 40 k
that are connected to VCC to ensure a logical high level input if the inputs are open circuited.
| Function | Receiver |
| Protocols | PECL |
| Number of transmitters | 0 |
| Number of receivers | 4 |
| Supply voltage (V) | 5 |
| Signaling rate (MBits) | 100 |
| Input signal | PECL |
| Output signal | TTL |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 85 |
| SOIC (D) | 16 | 59.4 mm² 9.9 x 6 |
| SOIC (DW) | 16 | 106.09 mm² 10.3 x 10.3 |