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TI(德州仪器) DS90LV018A
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  • TI(德州仪器) DS90LV018A
  • TI(德州仪器) DS90LV018A
  • TI(德州仪器) DS90LV018A
  • TI(德州仪器) DS90LV018A
  • TI(德州仪器) DS90LV018A
  • TI(德州仪器) DS90LV018A
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DS90LV018A

DS90LV018A

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3V LVDS 单通道 CMOS 差分线路接收器

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The DS90LV018A is a single CMOS differential line receiver designed for applications requiring ultra low power dissipation, low noise and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LV018A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver also supports open, shorted and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV018A has a flow-through design for easy PCB layout.

The DS90LV018A and companion LVDS line driver provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

  • >400 Mbps (200 MHz) Switching Rates
  • 50 ps Differential Skew (Typical)
  • 2.5 ns Maximum Propagation Delay
  • 3.3V Power Supply Design
  • Flow-Through Pinout
  • Power Down High Impedance on LVDS Inputs
  • Low Power Design (18mW @ 3.3V Static)
  • Interoperable with Existing 5V LVDS Networks
  • Accepts Small Swing (350 mV Typical) Differential Signal Levels
  • Supports Open, Short and Terminated Input Fail-Safe
  • Conforms to ANSI/TIA/EIA-644 Standard
  • Industrial Temperature Operating Range
    • (−40°C to +85°C)
  • Available in SOIC Package

All trademarks are the property of their respective owners.

FunctionReceiver
ProtocolsLVDS
Number of transmitters0
Number of receivers1
Supply voltage (V)3.3
Signaling rate (MBits)400
Input signalLVDS
Output signalCMOS
RatingCatalog
Operating temperature range (°C)-40 to 85
SOIC (D)829.4 mm² 4.9 x 6
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