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TI(德州仪器) SN74AVC2T45-Q1
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  • TI(德州仪器) SN74AVC2T45-Q1
  • TI(德州仪器) SN74AVC2T45-Q1
  • TI(德州仪器) SN74AVC2T45-Q1
  • TI(德州仪器) SN74AVC2T45-Q1
  • TI(德州仪器) SN74AVC2T45-Q1
  • TI(德州仪器) SN74AVC2T45-Q1
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SN74AVC2T45-Q1

SN74AVC2T45-Q1

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具有可配置电压转换和 3 态输出的汽车类 2 位双电源总线收发器

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This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVC2T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.

The SN74AVC2T45 is designed so that the DIR input is powered by VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state.

  • Qualified for Automotive Applications
  • Control Inputs VIH/VIL Levels Are
    Referenced to VCCA Voltage
  • Fully Configurable Dual-Rail Design Allows Each Port to
    Operate Over the Full 1.2-V to 3.6-V Power-Supply Range
  • I/Os Are 4.6-V Tolerant
  • Ioff Supports Partial-Power-Down Mode Operation
  • Max Data Rates
    • 500 Mbps (1.8-V to 3.3-V Translation)
    • 320 Mbps (<1.8-V to 3.3-V Translation)
    • 320 Mbps (Translate to 2.5 V or 1.8 V)
    • 280 Mbps (Translate to 1.5 V)
    • 240 Mbps (Translate to 1.2 V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 8000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

Technology familyAVC
ApplicationsGPIO, I2S
Bits (#)2
High input voltage (min) (V)0.78
High input voltage (max) (V)3.6
Vout (min) (V)1.2
Vout (max) (V)3.6
Data rate (max) (Mbps)500
IOH (max) (mA)-12
IOL (max) (mA)12
Supply current (max) (µA)20
FeaturesOvervoltage tolerant inputs, Partial power down (Ioff)
Input typeStandard CMOS
Output typeBalanced CMOS, Push-Pull
RatingAutomotive
Operating temperature range (°C)-40 to 125
VSSOP (DCU)86.2 mm² 2 x 3.1
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