The SN74HC595 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for cascading. When the output-enable (OE) input is high, the outputs are in the high-impedance state.
Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register.
(1) Additional temperature ranges available - contact factory
| Configuration | Serial-in, Parallel-out |
| Bits (#) | 8 |
| Technology family | HC |
| Supply voltage (min) (V) | 2 |
| Supply voltage (max) (V) | 6 |
| Input type | Standard CMOS |
| Output type | 3-State |
| Clock frequency (MHz) | 24 |
| IOL (max) (mA) | 7.8 |
| IOH (max) (mA) | -7.8 |
| Supply current (max) (µA) | 80 |
| Features | Balanced outputs, High speed (tpd 10-50ns), Output register, Positive input clamp diode |
| Operating temperature range (°C) | -55 to 125 |
| Rating | HiRel Enhanced Product |
| TSSOP (PW) | 16 | 32 mm² 5 x 6.4 |
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