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TI(德州仪器) SN74AUP2G80
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  • TI(德州仪器) SN74AUP2G80
  • TI(德州仪器) SN74AUP2G80
  • TI(德州仪器) SN74AUP2G80
  • TI(德州仪器) SN74AUP2G80
  • TI(德州仪器) SN74AUP2G80
  • TI(德州仪器) SN74AUP2G80
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SN74AUP2G80

SN74AUP2G80

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低功耗双通道上升沿 D 级触发器

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  • 特性
  • 参数
  • 封装 | 引脚 | 尺寸

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).

When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

  • Available in the Texas Instruments NanoStar™ Package
  • Low Static-Power Consumption
    (ICC = 0.9 µA Maximum)
  • Low Dynamic-Power Consumption
    (Cpd = 4.3 pF Typ at 3.3 V)
  • Low Input Capacitance (Ci = 1.5 pF Typical)
  • Low Noise – Overshoot and Undershoot
    <10% of VCC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 4.4 ns Maximum at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)

Number of channels2
Technology familyAUP
Supply voltage (min) (V)0.8
Supply voltage (max) (V)3.6
Input typeStandard CMOS
Output typePush-Pull
Clock frequency (max) (MHz)260
IOL (max) (mA)4
IOH (max) (mA)-4
Supply current (max) (µA)0.9
FeaturesBalanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)
Operating temperature range (°C)-40 to 85
RatingCatalog
DSBGA (YFP)81.8 mm² 1 x 1.8
UQFN (RSE)82.25 mm² 1.5 x 1.5
VSSOP (DCU)86.2 mm² 2 x 3.1
X2SON (DQE)81.4 mm² 1.4 x 1
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