h1_key

• Controlled Baseline
  • One Assembly/Test Site, One Fabrication Site
• Enhanced Diminishing Manufacturing Sources (DMS) Support
• Enhanced Product-Change Notification
• Qualification Pedigree⁽¹⁾
• Member of the Texas Instruments Widebus™ Family
• State-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power Dissipation
• Typical V_OLP (Output Ground Bounce) <: 1 V at V_CC = 5 V, T_A = 25°C
• High-Impedance State During Power Up and Power Down
• Distributed V_CC and GND Pin Configuration Minimizes High-Speed Switching Noise
• Flow-Through Architecture Optimizes PCB Layout
• High-Drive Outputs (-32-mA I_OH, 64-mA I_OL)
• Latch-Up Performance Exceeds 500 mA Per JESD 70
• ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Shrink Small-Outline (DL) Package

⁽¹⁾Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

Widebus, EPIC-IIB are trademarks of Texas Instruments.