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TI(德州仪器) SN74AUP1G240
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  • TI(德州仪器) SN74AUP1G240
  • TI(德州仪器) SN74AUP1G240
  • TI(德州仪器) SN74AUP1G240
  • TI(德州仪器) SN74AUP1G240
  • TI(德州仪器) SN74AUP1G240
  • TI(德州仪器) SN74AUP1G240
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SN74AUP1G240

SN74AUP1G240

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具有三态输出的单路 0.8V 至 3.6V 低功耗反相器

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  • 封装 | 引脚 | 尺寸

The AUP family is TI’s premier solution to the industry’s low power needs in battery-powered portable applications. This family assures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see AUP – The Lowest-Power Family ).

This buffer/driver is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. This device has the input-disable feature, which allows floating input signals.

To assure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Available in the Texas Instruments NanoStar™ Package
  • Low Static-Power Consumption
    • ICC = 0.9 µA Maximum
  • Low Dynamic-Power Consumption
    • Cpd = 4.2 pF at 3.3 V Typical
  • Low Input Capacitance
    • CI = 1.5 pF Typical
  • Low Noise – Overshoot and Undershoot
    <10% of VCC
  • Input-Disable Feature Allows Floating Input Conditions
  • Ioff Supports Partial Power-Down-Mode Operation
  • Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 4.7 ns Maximum at 3.3 V
  • Suitable for Point-to-Point Applications
Technology familyAUP
Supply voltage (min) (V)0.8
Supply voltage (max) (V)3.6
Number of channels1
IOL (max) (mA)4
IOH (max) (mA)-4
Supply current (max) (µA)10
Input typeStandard CMOS
Output type3-State
FeaturesBalanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)
RatingCatalog
Operating temperature range (°C)-40 to 85
DSBGA (YZP)52.1875 mm² 1.75 x 1.25
SOT-23 (DBV)58.12 mm² 2.9 x 2.8
SOT-SC70 (DCK)54.2 mm² 2 x 2.1
USON (DRY)61.45 mm² 1.45 x 1
X2SON (DPW)50.64 mm² 0.8 x 0.8
X2SON (DSF)61 mm² 1 x 1
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