This octal buffer and line driver is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The SN74AC240 device is organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
| Technology family | AC |
| Supply voltage (min) (V) | 2 |
| Supply voltage (max) (V) | 6 |
| Number of channels | 8 |
| IOL (max) (mA) | 24 |
| IOH (max) (mA) | -24 |
| Supply current (max) (µA) | 40 |
| Input type | Standard CMOS |
| Output type | 3-State |
| Features | Balanced outputs, Input clamp diode, Very high speed (tpd 5-10ns) |
| Rating | Automotive |
| Operating temperature range (°C) | -40 to 125 |
| TSSOP (PW) | 20 | 41.6 mm² 6.5 x 6.4 |
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