The SN74AC245 octal bus transceiver is designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.
When the output-enable (OE) is low, the device passes noninverted data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction control (DIR) input. A high on OE disables the device so that the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
| Supply voltage (min) (V) | 2 |
| Supply voltage (max) (V) | 6 |
| Number of channels | 8 |
| IOL (max) (mA) | 24 |
| IOH (max) (mA) | -24 |
| Input type | CMOS |
| Output type | CMOS |
| Features | Balanced outputs, Positive input clamp diode, Very high speed (tpd 5-10ns) |
| Technology family | AC |
| Rating | HiRel Enhanced Product |
| Operating temperature range (°C) | -40 to 85 |
| SOIC (DW) | 20 | 131.84 mm² 12.8 x 10.3 |
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