SN74LVC2G125-Q1系列介绍资料

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SN74LVC2G125-Q1

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具有三态输出的汽车类 2 通道、1.65V 至 5.5V 缓冲器

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The SN74LVC2G125-Q1 is a dual bus buffer gate designed for 1.65-V to 5.5-V V_CC operation. This device features dual line drivers with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is high.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Qualified for Automotive Applications
Supports 5-V V_CC Operation
Inputs Accept Voltages to 5.5 V
Max t_pd of 4.3 ns at 3.3 V
Low Power Consumption, 10-µA Max I_CC
±24-mA Output Drive at 3.3 V
Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
>2 V at V_CC = 3.3 V, T_A = 25°C
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

Technology family	LVC
Supply voltage (min) (V)	1.65
Supply voltage (max) (V)	5.5
Number of channels	2
IOL (max) (mA)	32
Supply current (max) (µA)	10
IOH (max) (mA)	-32
Input type	Standard CMOS
Output type	3-State
Features	Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)
Rating	Automotive
Operating temperature range (°C)	-40 to 85

SSOP (DCT)	8	11.8 mm² 2.95 x 4
VSSOP (DCU)	8	6.2 mm² 2 x 3.1

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SN74LVC2G125-Q1

具有三态输出的汽车类 2 通道、1.65V 至 5.5V 缓冲器

4000-306-326