The SN74LVC1G38 device is designed for 1.65-V to 5.5-V VCC operation.
This device is a single two-input NAND buffer gate with open-drain output. It performs the Boolean function Y = A × B or Y = A + B in positive logic.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
| Technology family | LVC |
| Supply voltage (min) (V) | 1.65 |
| Supply voltage (max) (V) | 5.5 |
| Number of channels | 1 |
| Inputs per channel | 2 |
| IOL (max) (mA) | 32 |
| IOH (max) (mA) | 0 |
| Input type | Standard CMOS |
| Output type | Open-drain |
| Features | Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) |
| Data rate (max) (Mbps) | 100 |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 125 |
| DSBGA (YZP) | 5 | 2.1875 mm² 1.75 x 1.25 |
| SOT-23 (DBV) | 5 | 8.12 mm² 2.9 x 2.8 |
| SOT-SC70 (DCK) | 5 | 4.2 mm² 2 x 2.1 |
| USON (DRY) | 6 | 1.45 mm² 1.45 x 1 |
| X2SON (DPW) | 5 | 0.64 mm² 0.8 x 0.8 |
| X2SON (DSF) | 6 | 1 mm² 1 x 1 |
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