The SN74LVC540A octal buffer/driver is designed for 2.7-V to 3.6-V VCC operation.
This device is ideal for driving bus lines or buffer-memory address registers. This device features inputs and outputs on opposite sides of the package that facilitate printed circuit board layout.
The 3-state control gate is a 2-input AND gate with active-low inputs so that, if either output-enable (OE1 or OE2) input is high, all outputs are in the high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
| Technology family | LVC |
| Supply voltage (min) (V) | 2 |
| Supply voltage (max) (V) | 3.6 |
| Number of channels | 8 |
| IOL (max) (mA) | 24 |
| IOH (max) (mA) | -24 |
| Supply current (max) (µA) | 10 |
| Input type | Standard CMOS |
| Output type | 3-State |
| Features | Balanced outputs, Very high speed (tpd 5-10ns) |
| Rating | Automotive |
| Operating temperature range (°C) | -40 to 125 |
| SOIC (DW) | 20 | 131.84 mm² 12.8 x 10.3 |
| TSSOP (PW) | 20 | 41.6 mm² 6.5 x 6.4 |