This octal bus transceiver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.
The SN74AUCH245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
| Supply voltage (min) (V) | 0.8 |
| Supply voltage (max) (V) | 2.7 |
| Number of channels | 8 |
| IOL (max) (mA) | 9 |
| IOH (max) (mA) | -9 |
| Input type | CMOS |
| Output type | CMOS |
| Features | Balanced outputs, Bus-hold, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) |
| Technology family | AUC |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 85 |
| VQFN (RGY) | 20 | 15.75 mm² 4.5 x 3.5 |