h1_key

TI(德州仪器) SN74AHC8541
德州仪器 (TI) 全系列产品在线购买
  • TI(德州仪器) SN74AHC8541
  • TI(德州仪器) SN74AHC8541
  • TI(德州仪器) SN74AHC8541
  • TI(德州仪器) SN74AHC8541
  • TI(德州仪器) SN74AHC8541
  • TI(德州仪器) SN74AHC8541
立即查看
您当前的位置: 首页 > 逻辑和电压转换 > 逻辑门 > 组合门 > SN74AHC8541
SN74AHC8541

SN74AHC8541

正在供货

SN74AHC8541

产品详情
  • 说明
  • 特性
  • 参数
  • 封装 | 引脚 | 尺寸

The SN74AHC8541 8-bit inverting/non-inverting buffers are ideal for driving bus lines or buffer memory address registers. These devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout.

All outputs are in the high-impedance state (disabled) when the output-enable (OE) input is high. When OE is low, the respective gate passes the data from the D input to its Y output.

The T/C input selects inverting or non-inverting data transfer. When the T/C input is high, it provides non-inverting buffers. When the T/C input is low, it provides inverting buffers when they are not in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

  • Operating Range of 2 V to 5.5 V VCC
  • 8-Bit Inverting/Non-Inverting Outputs
  • 20-Pin Thin Shrink Small-Outline Package
    [TSSOP (PW)] and 20-Pin Plastic Dual-In-Line
    Package [PDIP (N)]

Technology familyAHC
Supply voltage (min) (V)2
Supply voltage (max) (V)5.5
Number of channels8
Inputs per channel1
IOL (max) (mA)12
IOH (max) (mA)-12
Input typeStandard CMOS
Output type3-State
FeaturesOver-voltage tolerant inputs, Very high speed (tpd 5-10ns)
Data rate (max) (Mbps)110
RatingCatalog
Operating temperature range (°C)-40 to 85
PDIP (N)20228.702 mm² 24.33 x 9.4
产品购买
  • 商品型号
  • 封装
  • 工作温度
  • 包装
  • 价格
  • 现货库存
  • 操作
10s
温馨提示:
订单商品问题请移至我的售后服务提交售后申请,其他需投诉问题可移至我的投诉提交,我们将在第一时间给您答复
返回顶部