This 16-bit (dual-octal) noninverting bus transceiver is designed for 2.7-V to 3.6-V VCC operation.
The SN74LVCZ16245A is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements.
This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
Widebus is a trademark of Texas Instruments.
| Supply voltage (min) (V) | 2.7 |
| Supply voltage (max) (V) | 3.6 |
| Number of channels | 16 |
| IOL (max) (mA) | 24 |
| IOH (max) (mA) | -24 |
| Input type | TTL/CMOS |
| Output type | LVTTL |
| Features | Balanced outputs |
| Technology family | LVC |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 85 |
| SSOP (DL) | 48 | 164.358 mm² 15.88 x 10.35 |
| TSSOP (DGG) | 48 | 101.25 mm² 12.5 x 8.1 |
| TVSOP (DGV) | 48 | 62.08 mm² 9.7 x 6.4 |