The SN74LV8151 is a 10-bit universal Schmitt-trigger buffer with 3-state outputs, designed for 2-V to 5.5-V VCC operation. The logic control (T/C) pin allows the user to configure Y1 to Y8 as noninverting or inverting outputs. When T/C is high, the Y outputs are noninverted (true logic ), and when T/C is low, the Y outputs are inverted (complementary logic).
When output-enable (OE) input is low, the device passes data from Dn to Yn. When OE is high, the Y outputs are in the high-impedance state. The path A to P is a simple Schmitt-trigger buffer, and the path B to N is a simple Schmitt-trigger inverter.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
| Technology family | LV-A |
| Supply voltage (min) (V) | 2 |
| Supply voltage (max) (V) | 5.5 |
| Number of channels | 10 |
| IOL (max) (mA) | 12 |
| Supply current (max) (µA) | 20 |
| IOH (max) (mA) | -12 |
| Input type | Schmitt-Trigger |
| Output type | 3-State |
| Features | Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs, Partial power down (Ioff) |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 85 |
| SOIC (DW) | 24 | 159.65 mm² 15.5 x 10.3 |
| TSSOP (PW) | 24 | 49.92 mm² 7.8 x 6.4 |
| TVSOP (DGV) | 24 | 32 mm² 5 x 6.4 |
关注公众号，优惠活动早知道！
Copyright ©2023 wlxmall.com万联芯城版权所有 | 电信与信息服务业务经营许可证100798号 | 粤ICP备14012234号 | 投诉建议
客服电话：4000-306-326 文明办网文明上网举报电话：010-82615762 违法不良信息举报中心
| * 我的问题/建议： | |
| * 联系电话： | |
| 上传图片（选填）： |
请您提交2M以内的jpg,gif,png格式文件 |
| 投诉订单号（选填）： | |
购物车中还没有商品，赶紧选购吧！
正在供货
加入购物车
