SN74LVC1G00系列介绍资料

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SN74LVC1G00

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This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V V_CC operation.

The SN74LVC1G00 performs the Boolean function
Y = A × B or Y = A + B in positive logic.

The CMOS device has high output drive while maintaining low static power dissipation over a broad V_CC operating range.

The SN74LVC1G00 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.

Available in the Ultra Small 0.64-mm²
Package (DPW) With 0.5-mm Pitch
Supports 5-V V_CC Operation
Inputs Accept Voltages to 5.5 V
Provides Down Translation to V_CC
Max t_pd of 3.8 ns at 3.3 V
Low Power Consumption, 10-μA Max I_CC
±24-mA Output Drive at 3.3 V
I_off Supports Live Insertion, Partial-Power-Down Mode, and Back Drive Protection
Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 1000-V Charged-Device Model (C101)

Technology family	LVC
Supply voltage (min) (V)	1.65
Supply voltage (max) (V)	5.5
Number of channels	1
Inputs per channel	1
IOL (max) (mA)	32
IOH (max) (mA)	-32
Input type	Standard CMOS
Output type	Push-Pull
Features	Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)
Data rate (max) (Mbps)	100
Rating	Catalog
Operating temperature range (°C)	-40 to 125

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