CD54HC75系列介绍资料

您当前的位置：首页 > 逻辑和电压转换 > 触发器、锁存器和寄存器 > D 型锁存器 > CD54HC75

CD54HC75

正在供货

高速 CMOS 逻辑双路 2 位双稳态透明锁存器

立即搜索现货

产品详情|
产品购买|

产品详情

说明
特性
参数
封装 | 引脚 | 尺寸

The ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E and 2E) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E and 2E) is LOW the output is not affected.

True and Complementary Outputs
Buffered Inputs and Outputs
Fanout (Over Temperature Range)
- Standard Outputs...10 LSTTL Loads
- Bus Driver Outputs...15 LSTTL Loads
Wide Operating Temperature Range . . . –55°C to 125°C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, V_IL = 0.8V (Max), V_IH = 2V (Min)
- CMOS Input Compatibility, I_l 1µA at V_OL, V_OH

Data sheet acquired from Harris Semiconductor

Number of channels	4
Technology family	HC
Supply voltage (min) (V)	2
Supply voltage (max) (V)	6
Input type	Standard CMOS
Output type	CMOS
Clock frequency (max) (MHz)	28
IOL (max) (mA)	5.2
IOH (max) (mA)	-5.2
Supply current (max) (µA)	80
Features	High speed (tpd 10-50ns), Partial power down (Ioff)
Operating temperature range (°C)	-55 to 125
Rating	Military

CDIP (J)

135.3552 mm² 19.56 x 6.92

产品购买

商品型号
封装
工作温度
包装
价格
现货库存
操作

很抱歉，暂时无法提供与“CD54HC75”系列相匹配的产品，您可以联系专属客服快速找货或在现货搜索框中重新搜索。

专属客服快速找货

* 我的问题/建议：
* 联系电话：
上传图片（选填）：	请您提交2M以内的jpg,gif,png格式文件
投诉订单号（选填）：

h1_key

CD54HC75

高速 CMOS 逻辑双路 2 位双稳态透明锁存器

4000-306-326