CD4508B-MIL系列介绍资料

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CD4508B-MIL

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CMOS 双路 4 位锁存器

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CD4508B dual 4-bit latch contains two identical 4-bit latches with separate STROBE, RESET, and OUTPUT DISABLE control. With the STROBE line in the high state, the data on the "D" inputs appear at the corresponding "Q" outputs provided the DISABLE line is in the low state. Changing the STROBE line to the low state locks the data into the latch. A high on the reset line forces the outputs to a low level regardless of the state of the STROBE input. The outputs are forced to the high-impedance state for bus line applications by a high level on the DISABLE input.

The CD4508B types are supplied in 24-lead hermetic dual-in-line ceramic packages (F3A suffix), 24-lead dual-in-line plastic packages (E suffix), 24-lead small-outline packages (M, M96, and NSR suffixes), and 24-lead thin shrink small-outline packages (PW and PWR suffixes).

The CD4508B is similar to industry type MC14508.

Two independent 4-bit latches
Individual master reset for each 4-bit latch
3-state outputs with high-impedance state for bus line applications
Medium-speed operation: t_PHL = t_PLH = 70 ns (typ.) at V_DD = 10 V and C_L = 50 pF
100% tested for quiescent current at 20 V
5-V, 10-V, and 15-V parametric ratings
Standardized, symmetrical output characteristics
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Noise margin (full package-temperature range) =
        1 V at V_DD = 5 V
        2 V at V_DD = 10 V
     2.5 V at V_DD = 15 V
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
Applications:
- Buffer storage
- Holding registers
- Data storage and multiplexing

Number of channels	4
Technology family	CD4000
Supply voltage (min) (V)	3
Supply voltage (max) (V)	18
Input type	Standard CMOS
Output type	CMOS
Clock frequency (max) (MHz)	8
IOL (max) (mA)	2.4
IOH (max) (mA)	-2.4
Supply current (max) (µA)	3000
Features	High speed (tpd 10-50ns), Partial power down (Ioff), Standard speed (tpd > 50ns)
Operating temperature range (°C)	-55 to 125
Rating	Military

CDIP (J)	24	425.45 mm² 31.75 x 13.4
CDIP_SB (JD)	24	205.9178 mm² 27.94 x 7.37

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CD4508B-MIL

CMOS 双路 4 位锁存器

4000-306-326