These devices each contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state ('LS595) or open-collector ('LS596) outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct-overriding clear, serial input, and serial output pins for cascading.
Both the shift register and storage register clocks are positive-edge triggered. If the user wishes to connect both clocks together, the shift register state will always be one clock pulse ahead of the storage register.
| Configuration | Serial-in, Parallel-out |
| Bits (#) | 8 |
| Technology family | LS |
| Supply voltage (min) (V) | 4.75 |
| Supply voltage (max) (V) | 5.25 |
| Input type | Bipolar |
| Output type | 3-State |
| Clock frequency (MHz) | 25 |
| IOL (max) (mA) | 24 |
| IOH (max) (mA) | -2.6 |
| Supply current (max) (µA) | 65000 |
| Features | High speed (tpd 10-50ns) |
| Operating temperature range (°C) | -55 to 125 |
| Rating | Military |
| CDIP (J) | 16 | 135.3552 mm² 19.56 x 6.92 |
| CFP (W) | 16 | 69.319 mm² 10.3 x 6.73 |
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