These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight flip-flops of the BCT574 devices are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.
To ensure the high-impedance state during power up or power down, (OE) should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
(OE) does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
| Number of channels | 8 |
| Technology family | BCT |
| Supply voltage (min) (V) | 4.5 |
| Supply voltage (max) (V) | 5.5 |
| Input type | TTL-Compatible CMOS |
| Output type | 3-State |
| Clock frequency (max) (MHz) | 77 |
| IOL (max) (mA) | 48 |
| IOH (max) (mA) | -12 |
| Supply current (max) (µA) | 62000 |
| Features | Very high speed (tpd 5-10ns) |
| Operating temperature range (°C) | -55 to 125 |
| Rating | Military |
| CDIP (J) | 20 | 167.464 mm² 24.2 x 6.92 |
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