CD4015B consists of two identical, independent, 4-stage serial-input/parallel-output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. "Q" outputs are available from each of the four stages on both registers. All register stages are D-type, master-slave flip-flops. The logic level present at the DATA input is transferred into the first register stage and shifted over one stage at each positive-going clock transition. Resetting of all stages is accomplished by a high level on the reset line. Register expansion to 8 stages using one CD4015B package, or to more than 8 stages using additional CD4015Bs is possible.
The CD4015B-series types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic package (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
Data sheet acquired from Harris Semiconductor
| Configuration | Serial-in, Parallel-out |
| Bits (#) | 4 |
| Technology family | CD4000 |
| Supply voltage (min) (V) | 3 |
| Supply voltage (max) (V) | 18 |
| Input type | Standard CMOS |
| Output type | Push-Pull |
| Clock frequency (MHz) | 8.5 |
| IOL (max) (mA) | 4.2 |
| IOH (max) (mA) | -4.2 |
| Supply current (max) (µA) | 3000 |
| Features | Balanced outputs, Positive input clamp diode, Standard speed (tpd > 50ns) |
| Operating temperature range (°C) | -55 to 125 |
| Rating | Military |
| CDIP (J) | 16 | 135.3552 mm² 19.56 x 6.92 |
很抱歉,暂时无法提供与“CD4015B-MIL”系列相匹配的产品,您可以联系专属客服快速找货或在现货搜索框中重新搜索。