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TI(德州仪器) CD4068B-MIL
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  • TI(德州仪器) CD4068B-MIL
  • TI(德州仪器) CD4068B-MIL
  • TI(德州仪器) CD4068B-MIL
  • TI(德州仪器) CD4068B-MIL
  • TI(德州仪器) CD4068B-MIL
  • TI(德州仪器) CD4068B-MIL
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CD4068B-MIL

CD4068B-MIL

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CMOS 8 输入与非/与门

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  • 特性
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  • 封装 | 引脚 | 尺寸

CD4068B NAND/AND gate provides the system designer with direct implementation of the positive-logic 8-input NAND and AND functions and supplements the existing family of CMOS gates.

The CD4068B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

  • Medium Speed Operation:
       tPHL, tPLH=75 ns (typ.) at VDD = 10 V
  • Buffered inputs and outputs
  • 5-V, 10-V, and 15-V parametric ratings
  • Standardized symmetrical output characteristics
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (over full package-temperature range) =
         1 V at VDD = 5 V
         2 V at VDD = 10 V
      2.5 V at VDD = 15 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"

Data sheet acquired from Harris Semiconductor

Technology familyCD4000
Supply voltage (min) (V)3
Supply voltage (max) (V)18
Number of channels1
Inputs per channel8
IOL (max) (mA)1.5
IOH (max) (mA)-1.5
Input typeStandard CMOS
Output typePush-Pull
FeaturesStandard speed (tpd > 50ns)
Data rate (max) (Mbps)8
RatingMilitary
Operating temperature range (°C)-55 to 125
CDIP (J)14130.4652 mm² 19.56 x 6.67
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