SN74LVC32A系列介绍资料

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SN74LVC32A

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4 通道、双输入、1.65V 至 3.6V、24mA 驱动强度或门

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The SN54LVC32A quadruple 2-input positive-OR gate is designed for 2.7-V to 3.6-V V_CC operation, and the SN74LVC32A quadruple 2-input positive-OR gate is designed for 1.65-V to 3.6-V V_CC operation.

The SNx4LVC32A devices perform the Boolean function Y = A + B or Y = A + B in positive logic.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

Operate From 1.65 V to 3.6 V
Specified From –40°C to +85°C, –40°C to +125°C, and –55°C to +125°C
Inputs Accept Voltages to 5.5 V
Max t_pd of 3.8 ns at 3.3 V
Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot) > 2 V at V_CC = 3.3 V, T_A = 25°C
Latch-Up Performance Exceeds 250 mA Per JESD 17
On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model
- 200-V Machine Model
- 1000-V Charged-Device Model

Technology family	LVC
Supply voltage (min) (V)	1.65
Supply voltage (max) (V)	3.6
Number of channels	4
Inputs per channel	2
IOL (max) (mA)	24
IOH (max) (mA)	-24
Input type	Standard CMOS
Output type	Push-Pull
Features	Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)
Data rate (max) (Mbps)	100
Rating	Catalog
Operating temperature range (°C)	-40 to 125

SOIC (D)	14	51.9 mm² 8.65 x 6
SOP (NS)	14	79.56 mm² 10.2 x 7.8
SSOP (DB)	14	48.36 mm² 6.2 x 7.8
TSSOP (PW)	14	32 mm² 5 x 6.4
VQFN (RGY)	14	12.25 mm² 3.5 x 3.5

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SN74LVC32A

4 通道、双输入、1.65V 至 3.6V、24mA 驱动强度或门

4000-306-326