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TI(德州仪器) SN74LVC02A
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  • TI(德州仪器) SN74LVC02A
  • TI(德州仪器) SN74LVC02A
  • TI(德州仪器) SN74LVC02A
  • TI(德州仪器) SN74LVC02A
  • TI(德州仪器) SN74LVC02A
  • TI(德州仪器) SN74LVC02A
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SN74LVC02A

SN74LVC02A

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4 通道、双输入、1.5V 至 3.6V 或非门

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The SN54LVC02A quadruple 2-input positive-NOR gate is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVC02A quadruple 2-input positive-NOR gate is designed for 1.65-V to 3.6-V VCC operation.

The 'LVC02A devices perform the Boolean function Y = A + B or Y = AB in positive logic.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

  • Operate From 1.65 V to 3.6 V
  • Specified From -40°C to 85°C, -40°C to 125°C, and -55°C to 125°C
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.4 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

Technology familyLVC
Number of channels4
Supply voltage (min) (V)1.5
Supply voltage (max) (V)3.6
Inputs per channel2
IOL (max) (mA)24
IOH (max) (mA)-24
Output typePush-Pull
Input typeStandard CMOS
FeaturesOver-voltage tolerant Inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)
Data rate (max) (Mbps)100
RatingCatalog
Operating temperature range (°C)-40 to 125
SOIC (D)1451.9 mm² 8.65 x 6
SOP (NS)1479.56 mm² 10.2 x 7.8
SSOP (DB)1448.36 mm² 6.2 x 7.8
TSSOP (PW)1432 mm² 5 x 6.4
VQFN (RGY)1412.25 mm² 3.5 x 3.5
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