The SN54LVC86A quadruple 2-input exclusive-OR gate is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVC86A quadruple 2-input exclusive-OR gate is designed for 1.65-V to 3.6-V VCC operation.
The ’LVC86A devices perform the Boolean function Y = A 
B or Y = AB + AB in positive logic.
A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
| Technology family | LVC |
| Supply voltage (min) (V) | 1.65 |
| Supply voltage (max) (V) | 3.6 |
| Number of channels | 4 |
| Inputs per channel | 2 |
| IOL (max) (mA) | 24 |
| Input type | Standard CMOS |
| IOH (max) (mA) | -24 |
| Output type | Push-Pull |
| Features | Over-voltage tolerant Inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) |
| Data rate (max) (Mbps) | 100 |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 125 |
| SOIC (D) | 14 | 51.9 mm² 8.65 x 6 |
| SOP (NS) | 14 | 79.56 mm² 10.2 x 7.8 |
| SSOP (DB) | 14 | 48.36 mm² 6.2 x 7.8 |
| TSSOP (PW) | 14 | 32 mm² 5 x 6.4 |
| VQFN (RGY) | 14 | 12.25 mm² 3.5 x 3.5 |
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