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TI(德州仪器) SN74LVC138A
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  • TI(德州仪器) SN74LVC138A
  • TI(德州仪器) SN74LVC138A
  • TI(德州仪器) SN74LVC138A
  • TI(德州仪器) SN74LVC138A
  • TI(德州仪器) SN74LVC138A
  • TI(德州仪器) SN74LVC138A
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SN74LVC138A

SN74LVC138A

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3 线至 8 线解码器/多路信号分离器

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The SN74LVC138A devices are designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders minimize the effects of system decoding. When employed with high-speed memories using a fast enable circuit, delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.

  • Operate From 1.65 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 5.8 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
Technology familyLVC
Number of channels1
Operating temperature range (°C)-40 to 85
RatingCatalog
Supply current (max) (µA)10
SOIC (D)1659.4 mm² 9.9 x 6
SOP (NS)1679.56 mm² 10.2 x 7.8
SSOP (DB)1648.36 mm² 6.2 x 7.8
TSSOP (PW)1632 mm² 5 x 6.4
TVSOP (DGV)1623.04 mm² 3.6 x 6.4
UQFN (RSV)164.68 mm² 2.6 x 1.8
VQFN (RGY)1614 mm² 4 x 3.5
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