CD4093B系列介绍资料

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CD4093B

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具有施密特触发输入的 4 通道、双输入、3V 至 18V 与非门

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CD4093B consists of four Schmitt-trigger circuits. Each circuit functions as a two-input NAND gate with Schmitt-trigger action on both inputs. The gate switches at different points for positive- and negative-going signals. The difference between the positive voltage (V_P) and the negative voltage (V_N) is defined as hysteresis voltage (V_H) (see Fig. 2).

The CD4093B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

Schmitt-trigger action on each input with no external components
Hysteresis voltage typically 0.9 V at V_DD = 5 V and 2.3 V at V_DD = 10 V
Noise immunity greater than 50%
No limit on input rise and fall times
Standardized, symmetrical output characteristics
100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 18 V over full package-temperature range, 100 nA at 18 V and 25°C
5-V, 10-V, and 15-V parametric ratings
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
Applications:
- Wave and pulse shapers
- High-noise-environment systems
- Monostable multivibrators
- Astable multivibrators
- NAND logic

Technology family	CD4000
Supply voltage (min) (V)	3
Supply voltage (max) (V)	18
Number of channels	4
Inputs per channel	2
IOL (max) (mA)	6.8
IOH (max) (mA)	-6.8
Input type	Schmitt-Trigger
Output type	Push-Pull
Features	Standard speed (tpd > 50ns)
Data rate (max) (Mbps)	8
Rating	Catalog
Operating temperature range (°C)	-55 to 125

PDIP (N)	14	181.42 mm² 19.3 x 9.4
SOIC (D)	14	51.9 mm² 8.65 x 6
SOP (NS)	14	79.56 mm² 10.2 x 7.8
TSSOP (PW)	14	32 mm² 5 x 6.4

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CD4093B

具有施密特触发输入的 4 通道、双输入、3V 至 18V 与非门

4000-306-326