The SN54LVC573A octal transparent D-type latch is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVC573A octal transparent D-type latch is designed for 1.65-V to 3.6-V VCC operation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, input/output (I/O) ports, bidirectional bus drivers, and working registers.
| Number of channels | 8 |
| Technology family | LVC |
| Supply voltage (min) (V) | 1.65 |
| Supply voltage (max) (V) | 3.6 |
| Input type | Standard CMOS |
| Output type | 3-State |
| Clock frequency (max) (MHz) | 100 |
| IOL (max) (mA) | 24 |
| IOH (max) (mA) | -24 |
| Supply current (max) (µA) | 10 |
| Features | Balanced outputs, Flow-through pinout, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) |
| Operating temperature range (°C) | -40 to 125 |
| Rating | Catalog |
| PDIP (N) | 20 | 228.702 mm² 24.33 x 9.4 |
| SOIC (DW) | 20 | 131.84 mm² 12.8 x 10.3 |
| SOP (NS) | 20 | 98.28 mm² 12.6 x 7.8 |
| SSOP (DB) | 20 | 56.16 mm² 7.2 x 7.8 |
| TSSOP (PW) | 20 | 41.6 mm² 6.5 x 6.4 |
| TVSOP (DGV) | 20 | 32 mm² 5 x 6.4 |
| VQFN (RGY) | 20 | 15.75 mm² 4.5 x 3.5 |
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