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TI(德州仪器) CD74HCT174
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  • TI(德州仪器) CD74HCT174
  • TI(德州仪器) CD74HCT174
  • TI(德州仪器) CD74HCT174
  • TI(德州仪器) CD74HCT174
  • TI(德州仪器) CD74HCT174
  • TI(德州仪器) CD74HCT174
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CD74HCT174

CD74HCT174

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具有复位功能的高速 CMOS 逻辑六路 D 类触发器

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The ’HC174 and ’HCT174 are edge triggered flip-flops which utilize silicon gate CMOS circuitry to implement D-type flip-flops. They possess low power and speeds comparable to low power Schottky TTL circuits. The devices contain six master-slave flip-flops with a common clock and common reset. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the CLOCK input. The MR input, when low, sets all outputs to a low state.

Each output can drive ten low power Schottky TTL equivalent loads. The ’HCT174 is functional as well as, pin compatible to the ’LS174.

  • Buffered Positive Edge Triggered Clock
  • Asynchronous Common Reset
  • Fanout (Over Temperature Range)
    • Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . -55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH
Number of channels6
Technology familyHCT
Supply voltage (min) (V)4.5
Supply voltage (max) (V)5.5
Input typeTTL-Compatible CMOS
Output typePush-Pull
Clock frequency (max) (MHz)17
IOL (max) (mA)4
IOH (max) (mA)-4
Supply current (max) (µA)160
FeaturesBalanced outputs, High speed (tpd 10-50ns), Positive input clamp diode
Operating temperature range (°C)-55 to 125
RatingCatalog
PDIP (N)16181.42 mm² 19.3 x 9.4
SOIC (D)1659.4 mm² 9.9 x 6
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