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TI(德州仪器) SN74LVCH244A
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  • TI(德州仪器) SN74LVCH244A
  • TI(德州仪器) SN74LVCH244A
  • TI(德州仪器) SN74LVCH244A
  • TI(德州仪器) SN74LVCH244A
  • TI(德州仪器) SN74LVCH244A
  • TI(德州仪器) SN74LVCH244A
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SN74LVCH244A

SN74LVCH244A

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具有总线保持和三态输出的 8 通道、1.65V 至 3.6V 缓冲器

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The SN54LVCH244A octal buffer/line driver is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVCH244A octal buffer/line driver is designed for 1.65-V to 3.6-V VCC operation.

These devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low, these devices pass data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

  • Operate From 1.65 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 5.9 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
  • Support Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)
  • Ioff Supports Partial-Power-Down Mode Operation
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

Technology familyLVC
Supply voltage (min) (V)1.65
Supply voltage (max) (V)3.6
Number of channels8
IOL (max) (mA)24
Supply current (max) (µA)10
IOH (max) (mA)-24
Input typeStandard CMOS
Output type3-State
FeaturesBalanced outputs, Bus-hold, Very high speed (tpd 5-10ns)
RatingCatalog
Operating temperature range (°C)-40 to 85
SOIC (DW)20131.84 mm² 12.8 x 10.3
SOP (NS)2098.28 mm² 12.6 x 7.8
SSOP (DB)2056.16 mm² 7.2 x 7.8
SSOP (DBQ)2051.9 mm² 8.65 x 6
TSSOP (PW)2041.6 mm² 6.5 x 6.4
TVSOP (DGV)2032 mm² 5 x 6.4
VQFN (RGY)2015.75 mm² 4.5 x 3.5
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