h1_key

TI(德州仪器) SN74LVTH245A
德州仪器 (TI) 全系列产品在线购买
  • TI(德州仪器) SN74LVTH245A
  • TI(德州仪器) SN74LVTH245A
  • TI(德州仪器) SN74LVTH245A
  • TI(德州仪器) SN74LVTH245A
  • TI(德州仪器) SN74LVTH245A
  • TI(德州仪器) SN74LVTH245A
立即查看
您当前的位置: 首页 > 逻辑和电压转换 > 缓冲器、驱动器和收发器 > 通用收发器 > SN74LVTH245A
SN74LVTH245A

SN74LVTH245A

正在供货

具有三态输出的 3.3V ABT 八通道总线收发器

产品详情
  • 说明
  • 特性
  • 参数
  • 封装 | 引脚 | 尺寸

These octal bus transceivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

These devices are designed for asynchronous communication between data buses. They transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the devices so the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

  • Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
  • Typical VOLP (Output Ground Bounce)
       <0.8 V at VCC = 3.3 V, TA = 25°C
  • Support Unregulated Battery Operation Down to 2.7 V
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 500 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

Supply voltage (min) (V)2.7
Supply voltage (max) (V)3.6
Number of channels8
IOL (max) (mA)64
IOH (max) (mA)-64
Input typeTTL/CMOS
Output typeLVTTL
FeaturesBalanced outputs
Technology familyLVT
RatingCatalog
Operating temperature range (°C)-40 to 85
SOIC (DW)20131.84 mm² 12.8 x 10.3
SOP (NS)2098.28 mm² 12.6 x 7.8
SSOP (DB)2056.16 mm² 7.2 x 7.8
TSSOP (PW)2041.6 mm² 6.5 x 6.4
VQFN (RGY)2015.75 mm² 4.5 x 3.5
产品购买
  • 商品型号
  • 封装
  • 工作温度
  • 包装
  • 价格
  • 现货库存
  • 操作
10s
温馨提示:
订单商品问题请移至我的售后服务提交售后申请,其他需投诉问题可移至我的投诉提交,我们将在第一时间给您答复
返回顶部