These octal buffers/drivers are designed specifically for low-voltage (3.3-V) VCC operation, with the capability to provide a TTL interface to a 5-V system environment.
The LVTH241 devices are organized as two 4-bit line drivers with separate output-enable (1OE, 2OE) inputs. When 1OE is low or 2OE is high, the devices pass noninverted data from the A inputs to the Y outputs. When 1OE is high or 2OE is low, the outputs are in the high-impedance state.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
| Technology family | LVT |
| Supply voltage (min) (V) | 2.7 |
| Supply voltage (max) (V) | 3.6 |
| Number of channels | 8 |
| IOL (max) (mA) | 64 |
| Supply current (max) (µA) | 5000 |
| IOH (max) (mA) | -32 |
| Input type | TTL-Compatible CMOS |
| Output type | 3-State |
| Features | Bus-hold, Over-voltage tolerant inputs, Partial power down (Ioff), Power up 3-state, Ultra high speed (tpd <5ns) |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 85 |
| SOIC (DW) | 20 | 131.84 mm² 12.8 x 10.3 |
| SSOP (DB) | 20 | 56.16 mm² 7.2 x 7.8 |
| TSSOP (PW) | 20 | 41.6 mm² 6.5 x 6.4 |